I. Field of the Disclosure
The technology of the disclosure relates generally to circuit design, and more particularly to designing fin-based field effect transistors (FinFETs).
II. Background
Mobile communication devices have become common in current society. The prevalence of these mobile devices is driven in part by the many functions that are now enabled on such devices. Demand for such functions increases processing capability requirements and generates a need for more powerful batteries. Within the limited space of the housing of the mobile communication device, batteries compete with the processing circuitry. These and other factors contribute to a continued miniaturization of components within the circuitry.
Miniaturization of the components impacts all aspects of the processing circuitry including the memory transistors and other reactive elements in the processing circuitry. While miniaturization of components in mobile communication devices is easy for the consumer to appreciate as phones become smaller and lighter and have longer battery times, miniaturization pressures are not limited to mobile communication devices. Computing devices ranging from mobile communication devices to desktop computers to servers and the like all benefit from miniaturization efforts. In particular, almost all of these devices have various forms of memory which may include field effect transistors (FETs) including possibly FETs with fins, or FinFETs.
A FinFET has a series of fins on a first layer and a series of metal interconnections on upper layers. The metal interconnections allow for electrical connections to be made between active components of the integrated circuit that include the FinFET. The spacing between fins plus fin width of a FinFET is called the fin pitch. Likewise, the metal interconnections are implemented in modular components that have a certain width and space. The modular component width and space combined may be referred to as a metal pitch. For example, current FinFET designs may rely on designs that use a 3:4 metal pitch to fin pitch ratio.
As FinFETs are miniaturized, it may be difficult to retain the current metal pitch to fin pitch ratios while still meeting other process and design criteria such as cost effective fin and metal patterning process, metal width, metal space, and fin height or the like. Accordingly, there needs to be a new way to design smaller FinFETs.